基于晶圆尺度2D-MoS2 FETs的集成逻辑电路,使用埋门结构
Ju-Ah Lee1,2, Jongwon Yoon1, Seungkwon Hwang1
1Department of Energy and Electronic Materials, Surface Materials Division, Korea Institute of Materials Science (KIMS), Changwon 51508, Republic of Korea.
Nanomaterials (Basel, Switzerland)
|November 10, 2023
概括
埋藏门二硫化物 (MoS2) 晶体管克服了当地的后门限制,显著提高了先进逻辑电路的电气性能. 这一创新为高性能集成电子产品铺平了道路.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 纳米技术 纳米技术
背景情况:
- 二维 (2D) 过渡金属二甲基化物 (TMD),如二硫化物 (MoS),为下一代集成电路提供独特的电气性能.
- 在基板上使用MoS2的局部后门晶体管由于从门侧墙进行非均的电场控制,其电气特性受损.
研究的目的:
- 为了解决当地的后门MoS晶体管的局限性.
- 为了提高基于MoS的晶体管和集成逻辑电路的性能.
主要方法:
- 嵌入式门MoS2晶体管的制造,其门电极嵌入到基板中.
- 设备参数的表征和比较 (场效应移动性,开/关电流比,故障电压) 与本地后门设计相比.
- 在2英寸晶圆尺度上将埋藏门MoS2晶体管集成到各种逻辑门 (逆变器,NAND,NOR,AND,OR) 中.
主要成果:
- 现场效应移动性的显著改善 (0.166至1.08厘米2/V·s).
- 极大地提高了开/关电流比率 (4.90 × 10 5>到 1.52 × 10 7>).
- 门介电器 (15.73~27.48V) 的故障电压增加.
结论:
- 埋藏门架构有效地解决了本地后门设计的非统一场域可控性问题.
- 制造的埋门MoS2晶体管展示了适合高性能逻辑电路的卓越性能指标.
- 多种逻辑门的成功晶圆规模集成展示了这项技术在未来电子设备中的潜力.
相关概念视频
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