在平面内单层VTe2/WTe2基于异质连接的场效应晶体管的设备性能限制
Xingyi Tan1,2, Qiang Li2, Dahua Ren2
1Department of Physics, Chongqing Three Gorges University, Wanzhou, 404100, China.
Nanoscale
|December 4, 2023
概括
二维 (2D) VTe2 / WTe2 异质连接场效应晶体管 (FET) 对未来的电子产品显示出希望. 优化的双门 (DG) 设计与特定的底层符合2028年半导体技术要求,使得缩放到1纳米.
科学领域:
- 材料科学 材料科学 材料科学
- 凝聚物质物理学 凝聚物质物理学
- 纳米技术 纳米技术
背景情况:
- 基于的场效应晶体管 (FET) 面临着扩展限制.
- 两维 (2D) 过渡金属二基化物 (TMD) 为先进电子提供了潜在的替代方案.
- VTe2/WTe2异质连接正在成为设备应用中的有希望的二维材料.
研究的目的:
- 为了研究单层VTe2/WTe2异质连接的双门 (DGs) 的FET的运输特性.
- 为未来的半导体技术节点探索这些2D FET的设备性能限制.
- 到2028年,评估VTe2/WTe2 FET在高性能和低功耗应用中的可行性.
主要方法:
- 使用*ab initio*量子传输方法进行理论模拟.
- 模拟双门 (DG) FET,其门长为5nm (Lg).
- 模拟具有不同底层长度 (UL) 的设备,并采用负电容技术.
主要成果:
- 具有5nm Lg和2-3nm UL的DG冷源VTe2/WTe2 FET满足2028年半导体国际技术路线图 (ITRS) 关于现状电流 (离子),功率消耗 (PDP) 和延迟时间 (τ) 的要求.
- 具有3nm Lg和2-3nm UL的设备也满足了2028年ITRS需求的高性能指标.
- 整合负电容允许1nm Lg设备与3nm UL达到2028年的高性能目标.
结论:
- 2D DG-冷源 VTe2/WTe2 FET 是下一代电子产品的可行候选者.
- 优化的底层和门配置对于实现所需的性能指标至关重要.
- 这些2D FET显示了驱动摩尔定律缩小到1纳米节点的潜力.
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