对于CMOS兼容的内存逻辑设计的-范德瓦尔斯异构集成.
Mu-Pai Lee1, Caifang Gao2, Meng-Yu Tsai3,4
1Department of Materials Science and Engineering, National Yang Ming Chiao Tung University, Hsinchu 30010, Taiwan.
Science advances
|December 8, 2023
概括
研究人员开发了一种新的2D/3D异构集成设备,用于非挥发性,可重新配置的内存计算. 这种设计克服了CMOS的局限性,实现了高效的内存逻辑操作,增强了稳定性和性能.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 计算机工程 计算机工程
背景情况:
- 基于CMOS的内存计算在逻辑内存应用中面临非挥发性和重新配置性的挑战.
- 现有的设计在能源效率和复杂的集成方面扎.
研究的目的:
- 为了引入使用2D/3D异构集成的非挥发性,可重新配置设备的通用设计.
- 为了解决当前内存计算架构的局限性.
主要方法:
- 采用了范德瓦尔斯异构堆叠与照相控制的电荷捕获/脱落.
- 为了逻辑重新配置,采用了部分顶端的能量带景观.
- 研究了动态电荷波动和陷水平.
主要成果:
- 实现了精确的极性调整性和逻辑非挥发性.
- 在85°C的温度下证明了强度,具有近乎理想的下值摆动 (80mV dec-1).
- 将单元级联成一个单一电路层,显示高增益逻辑门 (65在Vdd=0.5V).
结论:
- 2D/3D异构集成设计为未来内存计算硬件提供了一个有前途的原型.
- 这种方法克服了CMOS技术的关键设计和功率挑战.
- 开发的设备在逻辑内存操作方面表现出卓越的性能和稳定性.
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