在memristor跨条数组中实现卷积神经网络,采用二进制激活和重量定量
Jinwoo Park1, Sungjoon Kim2, Min Suk Song1
1Department of Electrical and Computer Engineering, Inha University, Incheon 22212, Korea.
ACS applied materials & interfaces
|January 1, 2024
概括
我们开发了一个硬件友好的卷积神经网络,使用一个memristor交叉阵列. 这种新的架构能够为先进的人工智能硬件提供高效的3位多层操作.
科学领域:
- 神经形态工程的神经形态工程
- 材料科学 材料科学 材料科学
- 计算机科学 计算机科学
背景情况:
- 记忆器交叉阵列为神经网络的高效硬件加速提供了一个有前途的平台.
- 在基于memristor的系统中实施多层次操作和强大的激活功能仍然是一个挑战.
- 优化硬件架构以尽量减少设备的变化并最大限度地利用是实际应用的关键.
研究的目的:
- 提出和评估一个硬件友好的卷积神经网络架构,利用一个memristor交叉阵列.
- 实现3位多层次操作和二进制激活功能,以提高计算效率.
- 以证明使用拟议的基于memristor的系统进行矢量矩阵乘法和分类的可行性.
主要方法:
- 设计了一个32x32 memristor交叉杆阵列,并有一个超越抑制层.
- 在整个数组中实现了3位多层操作,支持16个内核.
- 使用了二进制激活函数和固定的内核方法,并采用了顺序输入应用.
- 矢量矩阵乘法 (VMM) 操作通过使用memristor设备进行实验证明.
- 一个神经元电路在面包板上经过实验验证.
主要成果:
- 该架构成功实现了3位多层操作和二进制激活函数.
- 由于memristors的模拟切换特性,可以实现精确的VMM操作.
- 在测试样本上进行硬件推断,并将分类性能与软件结果进行比较.
- 固定核方法有效地减少了未使用的细胞废物.
- 二进制激活函数证明了对设备状态变化的稳定性.
结论:
- 拟议的memristor交叉条数组架构为高效的神经网络实现提供了一个硬件友好的解决方案.
- 该系统展示了神经形态计算中准确VMM和分类任务的潜力.
- 该研究验证了对多层次操作和AI硬件中强大的激活函数的memristor的使用.
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