低指数Ge/原生氧化物异构结构的带抵消缩放
1Electronic Materials Growth and Interface Characterisation (ƐMaGIC) Lab, Department of Physics, National University of Singapore, 2 Science Drive 3, Singapore, 117551, Singapore.
Scientific reports
|March 4, 2024
概括
这项研究表明,氧化带偏移在不同表面类型中是一致的,取决于氧化度,而不是表面方向. 氧化速率各不相同,但带偏移仍然可以预测.
科学领域:
- 材料科学 材料科学 材料科学
- 表面科学是一门学科.
- 半导体物理 半导体物理
背景情况:
- 了解原生氧化物生长对于基于的电子产品至关重要.
- 半导体异构结构的电子特性高度依赖带偏移.
研究的目的:
- 为了研究不同晶表面上原氧化物的生长.
- 为了确定氧化/异构的价值和导电带偏移 (VBO和CBO).
- 为了确定氧化物度,表面类型和带偏移之间的关系.
主要方法:
- 用于化学分析的X射线光电子光谱 (XPS).
- 原子力显微镜 (AFM) 用于表面形态学.
- 在环境环境中模拟层次增长的分析.
主要成果:
- 在Ge(001),Ge(110) 和Ge(111) 表面上观察到VBO和CBO值的通用集合,取决于Ge-氧化物度.
- 氧化速率有很大的差异,由于表面粘合特性,Ge{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle Ge}{\displaystyle 00}{\displaystyle 00}}}) 的氧化速率是最快的.
- 尽管氧化速率各不相同,但波段偏移可以根据Ge-oxide度单独准确估计,无论基质表面类型如何.
结论:
- 原生氧化物生长在低指数表面上表现出伪层次的行为.
- 在Ge-oxide/Ge异构中的带偏移主要由Ge-oxide度来决定,而不是特定的Ge表面方向.
- 这一发现简化了基于的设备中电子属性的预测和控制.
相关概念视频
Biasing of Metal-Semiconductor Junctions
257
Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
257
Biasing of FET
272
Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
272


