基于VDCC的模拟过器的设计方法,用于取消电力线干扰
Chandan Kumar Choubey1, Sumit Kumar1, Sanjeev Kumar Pippal2
1Symbiosis Institute of Technology, Pune Campus, Symbiosis International (Deemed University), Pune, India.
MethodsX
|March 6, 2024
概括
本研究介绍了一种使用电压依赖电流输送器 (VDCC) 抑制电力线干扰的模拟过器. 新型设计允许独立控制过器参数,并且在实际应用中使用更少的组件.
科学领域:
- 电气工程 电气工程
- 模拟信号处理 模拟信号处理
- 过器的设计设计
背景情况:
- 电源线干扰 (例如50 Hz及其波) 会显著降低电子系统中的信号质量.
- 现有的口过器往往缺乏独立的参数控制,需要许多组件.
- 基于电压依赖电流输送器 (VDCC) 的过器提供了提高性能和组件效率的潜力.
研究的目的:
- 设计和验证一个模拟过器,以抑制50 Hz电源线干扰及其奇偶波 (150 Hz,250 Hz,350 Hz).
- 为了证明使用基于VDCC的级联划分过器以有效抑制频率的可行性.
- 要突出在拟议的过器架构中独立的参数控制和电子调度的优势.
主要方法:
- 通过对多个基于VDCC的口过器进行级联实现模拟孔过器.
- 使用VDCC作为高Q口过器的活性构件.
- 使用PSPICE模拟拟拟议的过器设计,其中包括用于VDCC的商业IC (MAX435,AD844).
主要成果:
- 拟议的子过器有效地抑制基本频率 (50 Hz) 和其前三个奇偶波.
- 实现了对每个隙过器的质量因子 (Q) 和极频率的独立控制.
- 过器配置要求每个隙中最少的积极 (1VDCC) 和被动 (2电容,2电阻) 组件.
- 使用MAX435和AD844的模拟证实了设计过器的实际实用性和性能.
结论:
- 基于VDCC的模拟过器为电力线干扰抑制提供了高效和可调节的解决方案.
- 设计的组件效率和独立的参数控制为传统方法提供了显著的优势.
- 使用易于使用的IC验证了这种过器拓学的实际实施.
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