PaCHNOC:为实时并行流信号处理提供数据包和电路混合交换的NOC.
Peng Hao1, Shengbing Zhang1, Xinbing Zhou2,3
1School of Computer Science, Northwestern Polytechnical University, Xi'an 710072, China.
Micromachines
|March 28, 2024
概括
PaCHNOC是一种混合型芯片上的网络 (NoC),可以有效地处理实时嵌入式数字信号处理器 (DSP) 系统的长短数据包. 这种新的方法显著降低了延迟,为5G基站子系统证明是最佳的.
科学领域:
- 计算机工程 计算机工程
- 嵌入式系统 嵌入式系统
- 电信 电信服务 电信服务 电信服务
背景情况:
- 实时异质并行嵌入式数字信号处理器 (DSP) 系统需要超低延迟的芯片上的网络 (NoC) 解决方案来有效处理数据流.
- 现有的包电路交换网络芯片 (PCCNOC) 在长数据包方面表现出色,但在短配置数据包方面存在显著的路由延迟.
研究的目的:
- 开发一种新的混合NoC架构,PaCHNOC,它解决了与嵌入式DSP系统中传输长短数据包相关的延迟挑战.
- 评估PaCHNOC在实时异质并行嵌入式DSP应用中的性能,特别是针对5G基站子系统.
主要方法:
- 引入了PaCHNOC,一种混合NoC架构,将长数据包的电路切换与短数据包的基于路由的传输相结合.
- 模拟PaCHNOC性能与嵌入式DSP系统的现有NOC解决方案相比.
- 在一个真正的5G基站基带子系统中实现并测试了PaCHNOC.
主要成果:
- 与嵌入式DSP系统模拟中的相关工作相比,PaCHNOC证明了总体延迟减少65%.
- PaCHNOC架构有效地将短数据包传输集成到路由过程中,绕过了设置延迟.
- 在5G基站基带子系统中部署导致31%的全面延迟减少.
结论:
- PaCHNOC是一种高效的混合NoC解决方案,用于实时异质并行嵌入式DSP系统,显著降低延迟.
- 在苛刻的应用中,PaCHNOC架构提供了一种优越的方法来处理各种数据包类型.
- PaCHNOC被验证为5G基站基带子系统的最佳NoC,提高了整体系统性能.
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