在芯片对芯片无电全铜互联连接中空缺的影响
Nana Ren1, Yuyi Zhang1, Wenlong Shu1
1College of Mechanical and Electrical Engineering, Central South University, Changsha 410083, China.
Micromachines
|May 25, 2024
概括
在3D芯片集成中,无电无电的铜互连可以由于缺少排放和反应剂供应不均而形成空隙. 优化层溶液流量和添加抑制剂显著改善了铜接头的质量.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 化学工程是化学工程的重要组成部分.
背景情况:
- 三维 (3D) 芯片集成依赖于微碰撞互连,但高粘合温度损害了可靠性.
- 无电流金属沉积为芯片对芯片互连提供了低温替代方案.
- 在无电铜合并过程中接口空隙仍然是3D芯片包装的关键挑战.
研究的目的:
- 调查影响无电全铜互连时空隙形成的因素.
- 分析微流体通道中的铜凸起的生长特征.
主要方法:
- 使用微流体通道装置进行沉积实验,以检查铜凸的生长.
- 在芯片碰撞之间对金溶液动态的有限元流量建模.
- 在不同间隙大小和涂层条件下对空隙的评估.
主要成果:
- 由于被困的和不均的反应物供应,在10微米的间隙中形成了显著的空隙.
- 流量建模揭示了凸周围的更高的金溶液速度,而不是在合并间隙内.
- 鉴定出排放和反应剂分布是空隙形成的关键因素.
结论:
- 优化层溶液流量和结合反应抑制剂,如2.2'-双二是有效的策略.
- 改进流量和抑制剂添加的综合方法成功提高了铜接头的合并质量.
- 这项研究为先进包装中无缺陷的无电铜互连提供了关键的见解.
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