2D/,

Bhartendu Papnai1,2,3, Ding-Rui Chen4,5, Rapti Ghosh6,7

  • 1Department of Engineering and System Science, National Tsing Hua University, Hsinchu 300044, Taiwan.

概括

研究人员使用分子层开发了一种基于石墨烯的新型二极管,在室温下达到显著的负差分电阻 (NDR). 这一突破为超越传统扩展限制的先进电子功能提供了可扩展的途径.

相关概念视频

MOS Capacitor01:25

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
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Metal-Semiconductor Junctions01:24

Metal-Semiconductor Junctions

The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The...
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Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
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Design Example: Capacitance Multiplier Circuit01:20

Design Example: Capacitance Multiplier Circuit

In integrated circuit technology, a capacitance multiplier is often utilized to produce a larger capacitance value when a small physical capacitance falls short. This is achieved by a circuit that multiplies capacitance values by a factor of up to 1000, such that a 10-pF capacitor can replicate the performance of a 100-nF capacitor.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
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Biasing of FET01:22

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
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Capacitor With A Dielectric01:18

Capacitor With A Dielectric

Parallel plate capacitors consist of two conducting plates separated by a certain distance. However, it is mechanically difficult to hold the large plates parallel to each other without actual contact. Hence, a dielectric layer is commonly placed between the plates, which provides an easy solution for holding the plates together with a small gap and increases the capacitance of the capacitor.
Dielectrics are non-conducting materials with no free or loosely bound electrons. When a dielectric is...
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