探索2D和3D铁电NAND记忆阵列中的扰动特征,用于下一代记忆技术
Ik-Jyae Kim1, Jiwoung Choi1, Jang-Sik Lee1
1Department of Materials Science and Engineering, Pohang University of Science and Technology (POSTECH), Pohang 37673, Korea.
ACS applied materials & interfaces
|June 20, 2024
概括
最佳通路电压是2D和3D铁电NAND阵列中使用基于哈夫尼亚晶体管的可靠,无干扰操作的关键. 这确保了微不足道的读取干扰,为先进的NAND闪存铺平了道路.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 半导体设备 半导体设备
背景情况:
- 铁电晶体管为3D NAND技术提供了与充电陷闪存相比的优势,包括更低的功耗和更快的速度.
- 阵列尺度可靠性对于在下一代3D NAND应用中采用铁电晶体管至关重要.
研究的目的:
- 为了研究基于哈夫尼亚的铁电晶体管的阵列规模可靠性,用于先进的3D NAND.
- 建立一个无干扰电压方案,以确保铁电晶体管在3D NAND阵列中的可靠运行.
主要方法:
- 专注于分析电压方案对2D和3D阵列配置中的铁电晶体管行为的影响.
- 评估了在各种电压压力下无干扰条件和读取干扰现象.
主要成果:
- 最佳通路电压对于在2D和3D铁电NAND阵列中实现无干扰运行至关重要.
- 当应用适当的读取电压时,读取干扰被发现是可以忽略不计的,这证实了操作可靠性.
结论:
- 基于Hafnia的铁电晶体管证明了在2D和3DNAND闪存中可靠运行的潜力.
- 识别的电压方案为提高铁电NAND技术在高密度应用中的可靠性提供了实用策略.
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