在Si/SiO_{2}界面上的空间分辨率介电损失
Megan Cowie1, Taylor J Z Stock2,3, Procopios C Constantinou2
1Department of Physics, <a href="https://ror.org/01pxwe438">McGill University</a>, Montréal, Québec, Canada.
Physical review letters
|July 12, 2024
概括
/二氧化 (Si/SiO2) 中的接口陷显著影响电子性能. 我们的研究揭示了纳米级的电荷组织时间尺度和介电损失异质性,这对于先进的纳米电子学至关重要.
科学领域:
- 固态物理 固态物理
- 材料科学 材料科学 材料科学
- 纳米技术 纳米技术
背景情况:
- /二氧化 (Si/SiO2) 接口包含影响电子性能的陷状态.
- 这些陷对于开发量子传感器,计算机和纳米电子设备至关重要.
研究的目的:
- 用纳米空间分辨率研究Si/SiO2接口的电敏度.
- 了解电荷组织动态和介电损失机制在这个接口.
主要方法:
- 使用频率调制原子力显微镜 (FM-AFM) 进行高分辨率测量.
- 研究了一种被埋在Si/SiO2接口附近的有模式的剂三角层.
主要成果:
- 确定Si/SiO2接口上的电荷组织时间尺度在1-150纳秒 (ns) 之间.
- 观察到在界面陷周围的时间尺度显著增加.
- 在纳米长度尺度上揭示了高度空间异质的介电损失.
结论:
- 金属绝缘体半导体电容器器件中的介电损失在变化时间的门偏差下显示MHz到MHz以下频率.
- 接口陷在观察到的电荷动态和介电损失异质性中发挥着关键作用.
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