为了使超薄 ALD Tep 频道场效应晶体管在无歇斯底里的情况下运行,需要采用的工艺
Minjae Kim1, Yongsu Lee2, Kyuheon Kim1
1Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), 77, Cheongam-ro, Nam-gu, Pohang-si, Gyeongsangbuk-do 37673, Republic of Korea. bhlee1@postech.ac.kr.
Nanoscale horizons
|August 30, 2024
概括
我们开发了一种新的 (Te) 原子层沉积 (ALD) 过程,以克服p型Te晶体管的局限性. 这种方法显著减少了hysteresis和off-state电流,从而提高了设备性能.
科学领域:
- 材料科学 材料科学 材料科学
- 半导体物理 半导体物理
- 纳米技术纳米技术
背景情况:
- (Te) 是一个有前途的p型半导体材料.
- 现有的基于Te的设备遭受了显著的I-V歇斯底里和高离位泄漏电流,阻碍了实际应用.
- 这些局限性阻碍了Te在超薄p通道设备中的使用.
研究的目的:
- 为 p型 (Te) 场效应晶体管 (FET) 开发一种新的原子层沉积 (ALD) 过程.
- 解决和克服基于Te的设备中大量歇斯底里和高离位泄漏电流的关键限制.
- 为了确定Te FETs中歇斯底里和离电源的起源.
主要方法:
- 开发了一种新的Te ALD工艺,结合TeO2种子层和Al2O3被动化.
- 为了分析设备的行为,进行了77K的操作研究.
- 进行了被动化过程优化和通道厚度调制.
主要成果:
- 优化的Te FET表现出最小的歇斯底里 (<23 mV) 和高场效应移动性 (33 cm^2 V^-1 s^-1).
- 在77K时,实现了超低的离电流 (~1 x 10^-14A),高的开/关比 (~10^8),以及的下值波动 (79 mV dec^-1).
- 该研究确定了金属-Te接触处的界面缺陷是高偏离状态电流的来源.
结论:
- 开发的Te ALD工艺有效地减轻了p型Te FET中的歇斯底里和离位电流.
- 这些发现表明,接口缺陷是高离位电流的首要原因,可以通过过程优化来解决.
- 这项工作通过克服主要的制造障碍,为Te在超薄p通道设备的成功应用铺平了道路.
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