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一个高分辨率的离散时间二次 ΣΔ ADC 具有更好的 KT/C 噪声耐受性,使用低超采样比率
Kyung-Chan An1, Neelakantan Narasimman2, Tony Tae-Hyoung Kim1
1Centre for Integrated Circuits and Systems, Nanyang Technological University, Singapore 639798, Singapore.
Sensors (Basel, Switzerland)
|September 14, 2024
概括
这项研究引入了一个新的Sigma-Delta模拟数字转换器 (ADC) 架构. 通过添加增益阶段,它可以显著降低噪音,使高分辨率传感器接口即使在有限的超采样比率.
科学领域:
- 电气工程 电气工程
- 信号处理 信号处理
- 微电子学微电子学
背景情况:
- 循环过器中的kt/C噪声限制了传统Sigma-Delta ADC中的分辨率.
- 高分辨率传感器接口需要先进的模拟到数字转换技术.
研究的目的:
- 提出一种新的Sigma-Delta ADC架构,可以减轻kT/C噪声.
- 为了实现高分辨率 (20位) 与减少过量采样比率 (OSR).
主要方法:
- 在循环过器之前实施了增益阶段,以减轻kT/C噪声.
- 设计了一个20位的Sigma-Delta ADC,使用65nm CMOS技术.
- 在1.2V供应电压下运行ADC,采样频率为512kHz.
主要成果:
- 达到117.7dB的峰值信号与噪声比 (SNR).
- 获得了 180.4 dB 的 Schreier 优点数字 (FoM).
- 证明有效的kT/C噪声降低与增加阶段的二次增益成比例.
结论:
- 拟议的架构使得高分辨率的ADC设计具有有限的OSR.
- 这种新的方法显著减少了循环波器噪声,放松了电容器的要求.
- 该设计为传感器接口应用提供了卓越的性能指标.
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