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相关概念视频

Aliasing01:18

Aliasing

122
Accurate signal sampling and reconstruction are crucial in various signal-processing applications. A time-domain signal's spectrum can be revealed using its Fourier transform. When this signal is sampled at a specific frequency, it results in multiple scaled replicas of the original spectrum in the frequency domain. The spacing of these replicas is determined by the sampling frequency.
If the sampling frequency is below the Nyquist rate, these replicas overlap, preventing the original...
122

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在分布式数据采集系统中为时钟同步采用混合方法.

Gabriele Manduchi1, Andrea Rigoni1, Luca Trevisan1

  • 1Consorzio RFX, Corso Stati Uniti, 4, 35127 Padova, Italy.

Sensors (Basel, Switzerland)
|September 28, 2024
PubMed
概括

本研究介绍了一种基于FPGA的新型时钟同步方法,用于芯片系统 (SoC) 架构. 它确保分布式数据采集系统的精确时间,这对于ITER等实验至关重要.

科学领域:

  • * 嵌入式系统工程
  • * 网络控制系统 网络控制系统
  • *科学仪器仪表使用

背景情况:

  • *精确的时间同步对于多设备数据采集至关重要.
  • * 现有的芯片系统 (SoC) 架构需要强大的时钟同步解决方案.
  • * 现场可编程门阵列 (FPGA) 为基于硬件的定时解决方案提供了一个灵活的平台.

研究的目的:

  • *为SoC架构提出一种简单有效的时钟同步方法.
  • * 集成一个可编程门阵列 (FPGA) 与中央处理单元 (CPU) 进行精确的定时.
  • * 确保科学实验在分布式系统中获得准确的数据.

主要方法:

  • * 实现了一个基于软件的网络同步协议 (NTP/PTP).
  • * 使用FPGA生成与系统时钟同步的时钟参考.
  • *采用分数时钟划分和比例积分 (PI) 控制器来保持时钟精度并防止漂移.
  • * 在RedPitaya平台上展示了一个特定的实现,生成1MHz时钟.

主要成果:

  • * 在FPGA生成的时钟和NTP同步的系统时钟之间实现了精确的时钟同步.
  • *通过实时软件监控和调整FPGA时钟频率,成功防止了时钟漂移.
关键词:
在FPGA中,FPGA是指FPGA.红皮塔亚 (RedPitaya) 是一个红皮塔亚.这就是为什么SoC SoC.计时系统的时间系统.

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  • * 在分布式数据采集设置中验证了系统的性能,以便快速记录过渡.

    • 结论:

    • * 拟议的基于FPGA的时钟同步方法对SoC架构有效.
    • *这种方法提高了分布式数据采集系统的可靠性,用于高精度的科学应用.
    • * 该系统适用于苛刻的环境,如ITER中性光束测试设施.