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Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots
Published on: November 1, 2013
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通过专用和字符串兼容的通道门铺平了通道无干扰的垂直NAND存储的道路
Zijian Zhao1, Sola Woo2, Khandker Akif Aabrar2
1University of Notre Dame, Notre Dame, Indiana 46556, United States.
ACS applied materials & interfaces
|October 7, 2024
概括
本研究介绍了用于垂直NAND存储的双端口电池设计,消除了通过干扰. 这一创新提高了高密度3D NAND闪存的可靠性.
科学领域:
- 电气工程 电气工程
- 材料科学 材料科学 材料科学
- 半导体设备物理 半导体设备物理
背景情况:
- 垂直NAND闪存对高密度数据存储至关重要.
- 垂直NAND中的单端口电池设计遭受通过干扰,限制性能和可靠性.
- 传输干扰是由于在读/写操作期间有意外的信号泄漏引起的.
研究的目的:
- 提出并验证用于垂直NAND存储的新型双端口电池设计.
- 为了消除垂直NAND闪存中的通过干扰.
- 确保与现有的3D NAND架构兼容,并允许进一步扩展.
主要方法:
- 开发一个带有专用,字符串兼容的通道门的双端口细胞架构.
- 在高门电压 (HVT) 和低门电压 (LVT) 状态下,对电场相互作用 (去极化和选效应) 的理论分析.
- 结合使用设备模拟和实验制造来验证设计的性能.
- 拟议设计的整合策略用于缩放的垂直NAND FeFET字符串和3D NAND.
主要成果:
- 双端口设计有效地消除通过HVT和LVT状态的独特场调制通过传输干扰.
- 模拟和实验证实了NAND字符串的无干扰运行,这与单端口设计相比是显著的改进.
- 拟议的通道门可以通过全局底部接触与现有的3D NAND集成,成本最小.
结论:
- 双端口电池设计为垂直NAND.中通过干扰的挑战提供了强大的解决方案.
- 这种设计有助于开发更可靠,更可扩展的高密度3D NAND闪存.
- 拟议的架构与当前的制造工艺兼容,为未来的进步铺平了道路.
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