斯电子设备具有超薄的高-κ门介电器,直接集成在1T'-MoTe2上
Enzi Chen1, Qing Zhu1, Yaoyu Duan2
1State Key Laboratory of Optoelectronic Materials and Technologies, School of Electronics and Information Technology and Guangdong Province Key Laboratory of Display Material, Sun Yat-sen University, Guangzhou 510275, China.
ACS applied materials & interfaces
|November 27, 2024
概括
原子层沉积使二维过渡金属石化物 (TMDC) 上的超薄高κ介电物成为可能. 这便于高性能场效应晶体管 (FET) 和集成逻辑电路,提高了门的效率和可扩展性.
科学领域:
- 材料科学 材料科学 材料科学
- 纳米技术 纳米技术
- 固态物理 固态物理
背景情况:
- 集成高质量的介电材料与二维过渡金属化物 (TMDCs) 对于先进的电子是必不可少的.
- 二维材料的表面特性,如没有悬浮键,对直接介电集成构成挑战.
- 开发强大的介电沉积方法是释放二维电子设备全部潜力的关键.
研究的目的:
- 开发一种方法,使用原子层沉积 (ALD) 直接将超薄高κ介电材料集成到1T'-MoTe2表面上.
- 为了制造高性能后门场效应晶体管 (FET),使用ALD集成的介电器在1T'-MoTe2.
- 为了证明2D电子设备和逻辑电路的拟议集成方法的可扩展性和多功能性.
主要方法:
- 使用原子层沉积 (ALD) 直接集成氧化 (HfO2) 介电薄膜到1T'-MoTe2.
- 在环境条件下利用1T'-MoTe2的自然氧化,以促进密集和均的介电沉积.
- 在HfO2/1T'-MoTe2上制造具有单层MoSSe的后门场效应晶体管 (FET),并演示集成逻辑电路.
主要成果:
- 在1T'-MoTe2.2上实现了5nm以下的超薄HfO2介电薄膜,其等效氧化物厚度 (EOT) 为0.97nm.
- 经过证明的后门式晶体管,当前开/关比超过10^5和低工作电压 (<1V).
- 展示了一组6x5的MoSSe晶体管阵列,其产量为86.7%,并成功制造了集成逻辑电路 (逆变器,NAND,NOR门).
结论:
- 拟议的ALD方法提供了一种可行且在工业上兼容的途径,用于将高κ介电材料与2DTMDC集成.
- 开发的集成技术使得高性能2D FET具有出色的门效率和充电载体移动性.
- 这种方法为复杂的二维电子设备和集成电路的制造提供了出色的厚度控制,统一性和可扩展性.
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