新型并行输入转移注册器与设置/重置终端在QCA纳米技术
Mohammad Gholami1, Maryam Movahedi2, Zaman Amirzadeh3
1Department of Electrical Engineering, Faculty of Engineering and Technology, University of Mazandaran, Babolsar, Iran.
Heliyon
|December 10, 2024
概括
本研究介绍了使用量子蜂自动机 (QCA) 技术实现高效并行入并行出 (PIPO) 和并行入串行出 (PISO) 转移寄存器的优化D锁设计. 新设计尽量减少细胞数量和占用面积,同时保持低延迟,提高电路性能.
科学领域:
- 数字电子产品数字电子产品
- 量子点蜂自动机 (QCA) 技术是量子点的.
背景情况:
- 变速寄存器是基本的数字电路,用于计算和比较单位.
- D-拉切是设计各种变速器的关键组件.
- 优化D锁设计会影响整体电路大小,电池数量和性能.
研究的目的:
- 设计新的D-拉切,以提高变速表的性能.
- 开发水平敏感和边缘敏感的平行入平行出 (PIPO) 转移记录器.
- 为了创建并行串行输出 (PISO) 变速寄存器,使用优化的D-拉切.
主要方法:
- 仔细设计D-拉切,专注于最小尺寸和细胞数量.
- 实施单层和多层PIPO和PISO转移记录器.
- 使用QCADesigner软件进行模拟和性能分析.
主要成果:
- 拟议的具有设置/重置终端的水平敏感PIPO变速寄存器使用145个QCA单元,占用0.13μm2,并且延迟约1.25个QCA时钟周期.
- 具有设置/重置引脚的边缘敏感PIPO转移寄存器使用163个QCA单元,占用0.17μm2,并且延迟约1.25个QCA时钟周期.
- 所有设计的电路都显示出高效的性能指标.
结论:
- 开发的D-拉切可以在QCA中创建高性能PIPO和PISO变速寄存器.
- 优化的设计在细胞数量,面积和延迟方面提供了显著的改进.
- 这项工作有助于推进基于QCA的数字电路设计.
相关概念视频
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