无电容的动态随机访问存储器与2D晶体管通过一步转移范德瓦尔斯介电器和电极
Jianmiao Guo1,2, Ziyuan Lin1,2, Xiangli Che1,3
1Department of Applied Physics, The Hong Kong Polytechnic University, Kowloon, Hong Kong 999077, China.
ACS nano
|January 10, 2025
概括
研究人员使用2D材料和六角化辅助传输过程开发了一种新的无电容2T0C DRAM. 这种先进的DRAM提供了卓越的面积效率,低功耗,并为未来的计算提供了增强的数据保留.
科学领域:
- 材料科学 材料科学 材料科学
- 半导体物理 半导体物理
- 纳米技术纳米技术
背景情况:
- 动态随机存取内存 (DRAM) 面临着由于电容降低和OFF电流增加而面临的扩展挑战.
- 无电容 2T0C DRAM 架构通过消除传统电容,提供区域效率和降低刷新率.
- 二维 (2D) 材料提供了扩展的机会,但对高质量的介电沉积提出了挑战.
研究的目的:
- 介绍一种六角化 (h-BN) 辅助的工艺,用于在二维晶体管中转移范德瓦尔斯介电介质和电极.
- 使用清洁接口的二硫化 (MoS2) 晶体管制造一个无电容的2T0C DRAM电池.
- 在速度,数据保留和能源效率方面评估制造的2T0C DRAM的性能.
主要方法:
- 对于范德瓦尔斯介电材料和电极,采用了h-BN辅助的一步转移工艺.
- 通过 (Al) 氧化形成氧化 (Al2O3) 介电,确保平坦性和均性.
- 同时制造两个无损的MoS2晶体管,以创建2T0C DRAM单元.
主要成果:
- 在MoS2晶体管中实现了超低的接口陷密度 (~3 × 10^11 cm^-2 eV^-1) 和泄漏电流密度 (到10^-7 A cm^-2).
- 展示了一种无电容的2T0C DRAM,具有快速的写入速度 (20 ns),长时间的数据保留 (> 1,000 s) 和低能耗 (~ 0.2 fJ/写入).
- 展示了3位存储能力和在多个写入/删除周期中的特殊稳定性.
结论:
- 通过h-BN辅助的传输过程,可以实现干净的接口,并为先进的DRAM应用程序保留固有的2D材料特性.
- 制造的无电容2T0C DRAM显示出出色的性能指标,解决了传统DRAM的关键局限性.
- 这种方法提高了与二维材料的兼容性,为下一代高性能内存设备铺平了道路.
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