实现基于FPGA的时间到数字转换器,使用相反转换传播和虚拟 Bin 方法
1Department of Biomedical Engineering at the University of California Davis, Davis, CA 95616, USA.
IEEE transactions on radiation and plasma medical sciences
|March 10, 2025
概括
本研究介绍了一种基于FPGA的时间到数字转换器 (TDC),使用虚拟 Bin (VB) 方法与相反过渡 (OT) 输入. 这种方法提高了需要快速测量的先进应用程序的定时精度.
科学领域:
- 数字电子数字电子数字电子
- 仪器化 仪器化 仪器化
- 信号处理 信号处理
背景情况:
- 准确的时间测量对于许多科学和工程应用至关重要.
- 现有的时间数字转换器 (TDC) 在时间分辨率和线性方面面临限制.
- 现场可编程门阵列 (FPGA) 为实现高性能数字系统提供了灵活的平台.
研究的目的:
- 开发一个基于FPGA的TDC,具有更好的时间分辨率和积分线性.
- 引入一种新的虚拟 Bin (VB) 方法,与相反过渡 (OT) 输入相结合,以提高性能.
- 用Xilinx 7系列FPGA验证拟议的TDC的有效性.
主要方法:
- 使用虚拟 Bin (VB) 策略实现基于 FPGA 的 TDC.
- 在两个Tapped-Delay Line (TDL) 上使用相反过渡 (OT) 输入来产生较少相关的时间 bin.
- 与传统的单调过渡 (MT) TDC和现有文献进行比较.
主要成果:
- 实现了平均容器大小为5.5 ps和RMS值为4.2 ps.
- 与MT TDC相比,证明了更好的时间分辨率和积分线性.
- 在温度变化和不同实施位置上表现出稳定的性能.
结论:
- 拟议的VB OT TDC有效地提高了计时精度,实现了检测时间差异的100 ps以下分辨率.
- 这种方法提供了一个低资源,高性能解决方案,用于快速定时测量.
- VB OT TDC适用于要求精确计时能力的下一代应用.
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