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垂直集成的双模晶体管启用了可重新配置的异突触传感器网络和内存神经形态计算

Srilagna Sahoo¹, Abin Varghese², Aniket Sadashiva¹

¹Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai 400076, India.

|March 28, 2025

概括

一个新的垂直集成晶体管 (VSFET) 能够实现高效的神经形态计算. 该设备以超低功耗模拟复杂的学习行为和逻辑操作,推进人工智能硬件.

科学领域:

材料科学材料科学材料科学
电气工程电气工程
计算机科学计算机科学

背景情况:

神经形态计算需要面积高效的架构来实现高速的数据处理.
现有的解决方案经常在大型数据集的延迟和功耗方面扎.

研究的目的:

开发一个紧的,垂直集成的晶体管架构,用于先进的神经形态内存计算.
为了证明设备在模拟生物学习机制和执行逻辑操作方面的能力.

主要方法:

使用2D MoS2和In2Se3通道制造一个垂直集成/分层场效应晶体管 (VSFET).
电静电合效应和晶体管突触行为的表征.
人工神经网络 (ANN) 和尖端神经网络 (SNN) 学习范式的实施和测试.
布尔逻辑门可重配置性的演示.

主要成果:

由于MoS2和In2Se3通道之间的静电合,VSFET表现出歇斯底里特征.
莫斯2晶体管成功模拟了高准确度和低非线性性的同性突触可塑性.
复杂的异质突触合作和竞争行为被模仿,复制了Aplysia部撤退反射.
在芯片上学习和突触模拟方面,实现了极低的功耗.
VSFET 证明了用于多功能计算应用的逻辑重新配置性.

结论:

VSFET为神经形态内存计算提供了一个有前途的,面积高效的平台.
该设备有效模拟生物学习和突触可塑性,为先进的AI硬件铺平了道路.
证明的逻辑重新配置性为未来的计算技术增加了显著的设计灵活性.

关键词:

2D铁电制品铁电制品在2Se3Se3中.在MoS2的基础上,MoS2 异质突触的可塑性异质突触的可塑性在内存中的神经形态神经形态.逻辑大门逻辑大门两个维的异构结构异构结构.

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