提高了高性能p型WSe2晶体管与原生氧化物WO界面层之间的歇斯底里
Hao-Yu Lan1,2, Yuanqiu Tan1,2, Shao-Heng Yang1,2
1Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, United States.
Nano letters
|March 31, 2025
概括
研究人员使用氧化 (WOx) 介层改进了化 (WSe2) 晶体管. 这种新的门介电策略提高了性能,并减少了下一代2D电子产品的缺陷.
科学领域:
- 材料科学 材料科学 材料科学
- 凝聚物质物理学 凝聚物质物理学
- 纳米技术纳米技术
背景情况:
- 原子薄的二维 (2D) 半导体,如过渡金属二甲基化物 (TMD),对下一代电子有希望.
- 实际应用受到寻找合适的门介电材料和最小化接口/氧化物陷的挑战所限制.
- 化 (WSe2) 是该领域的关键材料,但其集成需要优化的接口.
研究的目的:
- 引入一种用于改善WSe2 p型场效应晶体管 (p-FETs) 的介电接口的新策略.
- 调查一氧化 (WOx) 介层在高κ二氧化 (HfO2) 后门堆中的作用.
- 为了提高基于WSe2的电子设备的性能和可靠性.
主要方法:
- 在WSe2和高κ二氧化 (HfO2) 后门介电器之间集成原生氧化 (WOx) 的中间层.
- 使用新型门堆制造和表征WSe2 p-FETs.
- 用于评估设备性能的电气测量,包括下值摆动 (SS) 和歇斯底里.
主要成果:
- 该WOx中间层有效地充当了兴奋剂层,调整值电压 (VTH).
- 观察到WSe2-HfO2接口质量的显著改善.
- 在长通道p-FET中实现了约68mV/dec的近乎理想的下值波动 (SS).
- 在6V门扫描范围内的设备歇斯底里显著改善.
结论:
- 整合WOx中间层是一种可行的策略,可以提高WSe2p-FETs的性能.
- 这种方法有效地减轻了接口和氧化物陷,导致几乎理想的设备特性.
- 该研究为将高-κ介电材料集成到高性能二维电子设备中提供了一条途径.
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