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逻辑技术中的二维材料:2DM-MBC CFET中的功率效率和可扩展性

Seung Heon Shin¹, Dong-Ho Kang^2,3, Hoon Hahn Yoon^2,3

¹Department of Electronic Materials, Devices and Equipment Engineering, Soonchunhyang University, Asan 31538, Republic of Korea.

|April 24, 2025

概括

推进逻辑场效应晶体管 (FET) 需要优化高密度,高速数字电子的功耗. 在3D堆叠的互补场效应晶体管 (CFET) 中的二维材料 (2DM) 对超低功率设备显示出希望.

科学领域:

材料科学材料科学材料科学
电气工程电气工程
半导体物理半导体物理

背景情况:

数字进化需要高性能逻辑技术,具有高密度,速度和低功耗.
电力消耗是微型逻辑设备的关键挑战,影响了可靠性和可扩展性.

研究的目的:

审查逻辑场效应晶体管 (FET) 中用于管理功耗的关键参数.
检查逻辑FETs的单元和数组结构的进步.
探索2D材料 (2DMs) 在超低功率设备的3D堆叠结构中的潜力.

主要方法:

逻辑回顾FET发展史,结构创新和电力消耗挑战.
在3D堆叠的互补场效应晶体管 (CFET) 中研究2D材料 (2DM).
对CFET工业化的2DM NMOS和PMOS当前进展和挑战的分析.

主要成果:

逻辑FET需要仔细的参数管理,以节省功耗.
2D材料 (2DMs) 在2DM-MBC CFET等3D堆叠结构中为超低功耗提供了显著的好处.
开发用于CFET工业化的2DM NMOS和PMOS面临着持续的挑战.

结论:

逻辑FET结构的进步对于满足数字化发展需求至关重要.
基于2DM的3D堆叠CFETs,特别是2DM-MBCCFETs,代表了未来超低功率逻辑技术的有希望的途径.
需要进一步的研究和开发,以克服2DM CFET工业化的挑战.

关键词:

两维材料是二维材料.三维堆设备的3D堆设备.补充场效应晶体管补充场效应晶体管多桥道多桥道电力消耗电力消耗电力消耗

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