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一个高密度的4H-SiC MOSFET,基于一个低Qgd和Ron的埋场限制环
Wenrong Cui1, Jianbin Guo1, Hang Xu1
1School of Microelectronics, Fudan University, Shanghai 200433, China.
Micromachines
|April 26, 2025
概括
本研究介绍了一种优化的盾牌门沟碳化 (SiC) 结构. 它显著降低了电场应力对门氧化物,提高了设备的性能,并允许更小的电池场.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 半导体物理 半导体物理
背景情况:
- 碳化 (SiC) MOSFET由于其优越的性能,对高功率应用至关重要.
- 传统的盾牌门结构面临着电场拥挤和性能限制的挑战.
研究的目的:
- 提出和分析一个优化的盾牌门沟4H-SiC结构.
- 为了增强氧化物保护和改善设备性能指标.
主要方法:
- 使用 TCAD 工具进行设备模拟.
- 对门氧化物附近电场分布的分析.
- 与传统的P+盾结构进行比较.
主要成果:
- 拟议的带有接地P+屏蔽的分裂沟有效地抑制了电场峰值.
- 实现了78%的门排水费 (Qgd) 的降低和108%的优点数字 (FoM) 的增加.
- 理论上预计设备电池距离为1.8微米,特定的启动电阻 (R_on) 低于0.94mΩ·cm2.
结论:
- 优化的盾牌门沟4H-SiC结构提供了卓越的门氧化物保护.
- 该设备在性能指标上显示出显著的改进,使其适合高级应用.
- 结构的简单性和兼容性使其在未来的高性能SiC MOSFET中更容易采用.
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