在4H-SiC沟MOS电容器中研究ZrO2门介电器与薄SiO2界面层
Qimin Huang1,2,3, Yunduo Guo1,2,3, Anfeng Wang1,2,3
1Institute of Wide Bandgap Semiconductors and Future Lighting, Academy for Engineering & Technology, Fudan University, Shanghai 200433, China.
Materials (Basel, Switzerland)
|May 7, 2025
概括
优化碳化 (SiC) MOSFETs,这项研究使用SiO2/ZrO2堆增强了门介电. 新结构改善了故障电场,并减少了泄漏电流,以提高设备性能.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 半导体物理 半导体物理
背景情况:
- 将SiC MOSFET转换为沟架构需要对门介电优化.
- ZrO2和SiO2/ZrO2门介电物的接口特性对于设备性能至关重要.
研究的目的:
- 通过原子层沉积 (ALD) 培养的ZrO2和SiO2/ZrO2门介电膜的界面特性.
- 评估这些介电物的性能和适用性,用于设备应用的SiC外轴沟结构.
主要方法:
- 原子层沉积 (ALD) 用于薄膜生长.
- 扫描电子显微镜 (SEM),原子力显微镜 (AFM) 和光谱圆测量 (SE) 用于物理特征.
- 用于化学分析的X射线光电子光谱 (XPS).
- 电气表征以确定故障电场 (E_BR) 和泄漏电流 (I_ON_EBR).
主要成果:
- 对于ZrO2和SiO2/ZrO2.2,光滑薄膜形态的粗度<1 nm和可比厚度 (~41 nm) 均为ZrO2和SiO2/ZrO2.
- XPS揭示了SiO2/ZrO2膜中Zr 3d结合能量的上升变化.
- 电气测试显示,SiO2/ZrO2堆的E_BR增强 (3.76至5.78 MV·cm-1) 和I_ON_EBR减少 (1.94至2.09 × 10-3 A·cm-2).
- 在堆叠的片中,Schottky发射被抑制了.
结论:
- 堆叠的SiO2/ZrO2介电器有效地减轻了带隙补偿问题.
- 加入SiO2可以增强分解电场,减少泄漏电流.
- 优化的门介电器提高了整体SiC MOSFET设备的性能.
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