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一种基于串联二维晶体管负转导的多值逻辑门的通用实现方法
Guangchao Zhao1,2, Wanting Wen3, Keyi Liao3
1IRL 3288 CINTRA (CNRS/NTU/Thales), Nanyang Technological University, Singapore 637457, Singapore.
ACS nano
|June 30, 2025
概括
本研究介绍了使用2D材料,如MoS2和BP.新型多值逻辑 (MVL) 门. 新设计减少了晶体管数量和功耗,以实现人工智能应用中的更高信息密度.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 计算机科学 计算机科学
背景情况:
- 多值逻辑 (MVL) 提供了更高的信息密度,但面临着硬件限制.
- 现有的MVL硬件,特别是 radix > 3 的硬件,是复杂的和未经探索的.
- 二维 (2D) 材料为简化 MVL 设备结构提供了机会.
研究的目的:
- 开发一种通用方法,用于建造更高半径的MVL门.
- 为了克服硬件复杂性的挑战,在实践中采用MVL.
- 用二维材料演示新的MVL门户家族.
主要方法:
- 在串联连接的MoS2和BP晶体管中利用负传导 (NTC) 效应.
- 在黑 (BP) 晶体管中使用多个电流谷进行逻辑操作.
- 设计和模拟具有减少晶体管数量的MVL门.
主要成果:
- 成功实现了MVL门家族,用于半径3,4和5.
- 经过证明的四元 (r=4) 和五元 (r=5) 逆变器分别仅使用4个和5个晶体管.
- 与现有设计相比,实现了更高的直流收益和更低的功耗.
结论:
- 拟议的方法提供了一种高辐射MVL门的高效方法.
- 使用2D材料简化了MVL设备架构.
- 已建立的紧型号和同等电路为未来的大规模MVL系统设计提供了便利.
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