晶圆尺度高流动性2D薄膜晶体管用于异质集成3D-CFET逻辑电路
Yalun Tang1, Yilong Song1, Longhui Zeng1
1Department of Electrical and Computer Engineering, University of California San Diego, 9500 Gilman Dr., La Jolla, California, 92093, United States.
Small (Weinheim an der Bergstrasse, Germany)
|July 9, 2025
概括
研究人员开发了高性能,低温处理的2D (Te) 薄膜晶体管 (TFT) 用于补充场效应晶体管 (CFET). 这一突破使先进的3D集成电路成为可能,提高了下一代电子产品的功能和能源效率.
科学领域:
- 材料科学 材料科学 材料科学
- 半导体物理 半导体物理
- 电子工程 电子工程
背景情况:
- 互补场效应晶体管 (CFET) 垂直集成p通道和n通道晶体管用于先进的电子.
- 开发高性能,后端 (BEOL) 兼容的p通道薄膜晶体管 (TFT) 仍然是晶圆尺度CFET技术面临的重大挑战.
- 现有的基于 (Te) 的p通道TFT显示了不令人满意的设备性能.
研究的目的:
- 开发一种高性能,低温加工的p通道TFT,用于BEOL兼容的CFET.
- 为了改善2D薄膜的载体运输,以提高设备性能.
- 在3DCFET架构中证明p通道Te-TFT与n通道氧化TFT的异质集成的可行性.
主要方法:
- 在平面内以晶体为导向的2D Te通道薄膜的增长.
- 制造具有最大工艺温度为150°C的p通道Te-TFT.
- 将2D p-Te TFT与n-a-IGZO TFT集成,以创建一个混合CFET设备.
主要成果:
- 在2D Te-TFTs中实现了高和流动性 (≈31 cm2 V-1 s-1).
- 成功制造了2英寸晶圆上具有异质集成的3D垂直CFET设备.
- 在混合CFET中,在VDD=4V时,表现出优异的逆变器特性,高电压增益为162.
结论:
- 低温加工的p通道Te-TFT是BEOL异质兼容集成的一个有希望的解决方案.
- 这项技术可以为下一代电子产品提供增强的功能和高能效.
- 开发的2D Te TFT为先进的3D集成电路和晶圆尺度CFET应用铺平了道路.
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01:22Biasing of FET
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01:20Types of Semiconductors
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