Updated: Sep 13, 2025
Optimized Fabrication Procedure for High-Quality Graphene-based Moiré Superlattice Devices
Published on: July 11, 2025
Shuwen Sun1, Pablo Jarillo-Herrero2
1Department of Physics, Massachusetts Institute of Technology.+1
制造高质量的石墨烯moiré超级格子是一个挑战. 本研究介绍了一种优化的干转移技术,用于精确的控制,为先进的moiré材料研究提供具有所需扭转角度的统一设备.
您也可能阅读
通过共同作者、期刊和引用图与本文相关的文章。
科学领域:
背景情况:
研究的目的:
主要方法:
主要成果:
结论:
Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018