通过对抗管间静电合,实现碳纳米管晶体管中的博尔兹曼切换极限
Jinshuai Lv1, Hang Zhou2, Zhiyi Cui1
1Key Lab for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, School of Electronics, Peking University, Beijing 100871, China.
ACS nano
|September 15, 2025
概括
对齐的碳纳米管晶体管因堆叠而面临脱状态降解. 双门设计克服了这一问题,使高级电子设备的高性能场效应晶体管 (FET) 成为可能.
科学领域:
- 材料科学 材料科学 材料科学
- 纳米技术纳米技术
- 半导体设备 半导体设备
背景情况:
- 高密度对齐碳纳米管 (A-CNTs) 为下一代场效应晶体管 (FETs) 提供了卓越的载体流动性.
- 短通道A-CNT晶体管表现出状态下降解,阻碍其在1nm以下技术中的使用.
- 在A-CNT晶体管中性能降低背后的机制仍然不清楚.
研究的目的:
- 研究A-CNT晶体管性能降低的原因.
- 提出一种新的设备架构来缓解这些问题.
- 评估未来集成电路的拟议架构的性能.
主要方法:
- 分析A-CNT堆叠在单门配置中诱导的带隙缩小 (BGN).
- 为A-CNT晶体管设计和制造双门 (DG) 架构.
- 关于 DG A-CNT FET 性能的描述,包括下值波动和开/关电流比率.
主要成果:
- 在单门晶体管中,A-CNT堆叠会导致显著的BGN,损害静电控制.
- 拟议的 DG 架构有效地抑制了 BGN,实现了接近 Boltzmann 极限 (60 mV/十年) 的下值波动.
- 制造的10纳米超短门DG A-CNT FET表现出高性能: >1.8 mA/μm和电流,2.1 mS/μm峰值传导率,以及106的开/关比.
结论:
- 堆叠诱导的BGN是限制A-CNT晶体管性能的一个关键因素.
- 总局架构提供了一种有效的解决方案,以克服BGN和静电退化.
- DG A-CNT的FET满足了最先进的集成电路和后穆尔技术的严格性能要求.
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