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Evgeny V Lezhnev1, Aleksandr Y Romanov1, Dmitry V Telpukhov2
1HSE University, 101000 Moscow, Russia.
本研究介绍了一种方法,通过使用数据包生成器来简化低级网络上芯片 (NoC) 建模. 这种方法提高了模拟的可扩展性,并加快了NoC路由算法的分析速度.
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