一个子采样相锁循环与基于CMOS图像传感器电容器乘数的双充电
Yuguo Lin1, Bin Wang1, Liqing Jin1
1State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, School of Microelectronics, Xidian University, Xi'an 710071, China.
Micromachines
|November 27, 2025
概括
这项研究引入了一种使用电容乘法的新次采样相锁循环 (SSPLL). 这种设计可以实现低动和低功耗,同时最大限度地减少面积,非常适合高分辨率图像传感器.
科学领域:
- 集成电路 集成电路
- 信号处理 信号处理
背景情况:
- 传统的分采样相锁循环 (SSPLL) 面临着稳定性,刺激降解和面积开销方面的挑战.
- 现有的零补偿技术往往会降低性能或增加芯片大小,限制它们在高分辨率图像传感器中的使用.
研究的目的:
- 提出一种新的SSPLL设计,克服传统方法的局限性.
- 为了提高SSPLL在稳定性,动,冲刺,功耗和面积方面的性能.
主要方法:
- 引入了一种电容乘法技术,使用双充电 (CP1和CP2) 与反同步的充/放电状态.
- 实施了一个协调的操作方案,以扩大循环波器容量,而不会增加物理布局面积.
- 集成的零补偿技术,以保持SSPLL的稳定性.
主要成果:
- 拟议的SSPLL采用55nmCMOS工艺设计,在1MHz偏移 (1.2GHz输出频率) 时实现了131.5dBc/Hz的点相噪声.
- 已证明集成的RMS动率为549 fs (10 kHz40 MHz频谱) 和刺激被抑制到-51.3 dB.
- 实现了3.81mW的功率效率和0.064mm2的紧布局面积.
结论:
- 新型双充电 (CP) 充电乘法技术有效地减少了动和功耗,同时最大限度地减少了布局面积.
- 这种SSPLL设计为高分辨率图像传感器应用提供了可行的技术解决方案.
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