为二维铁电场效应晶体管集成独立的高k氧化物膜
Zejing Guo1,2, Xuyang Sha1,2, Fang Xu3
1State Key Laboratory of Surface Physics and Institute for Nanoelectronic Devices and Quantum Computing, Fudan University, Shanghai, 200433, China.
Advanced science (Weinheim, Baden-Wurttemberg, Germany)
|December 14, 2025
概括
研究人员开发了一种耐缺陷策略,将独立的铁电膜与二维半导体通道集成在一起,使铁电场效应晶体管 (FeFET) 等节能纳米电子设备成为可能. 这一突破增强了非易失性记忆和神经形态计算应用.
科学领域:
- 材料科学 材料科学 材料科学
- 纳米技术 纳米技术
- 电子工程 电子工程
背景情况:
- 由于CMOS不兼容性和集成问题,将高k铁电 (例如BaTiO3) 与先进电子产品的半导体通道相集成是具有挑战性的.
- 独立的铁电膜提供了范德瓦尔斯集成路线,但面临机械变形和泄漏问题.
- 现有的方法在保护膜完整性和在铁电场效应晶体管 (FeFET) 中实现低功耗运行方面扎.
研究的目的:
- 为顶门FeFET集成独立的BaTiO3膜与MoS2通道提出一个耐缺陷的策略.
- 为了克服在铁电膜的转移和集成过程中机械稳定性和泄漏电流的挑战.
- 展示一个可扩展的平台,用于高性能可重新配置的2D纳米电子.
主要方法:
- 开发了一种通过水介导的释放和PMMA辅助的转移过程,以保持膜和接口的完整性.
- 设计了一个纳米级的介电道连接器,以有效地抑制泄漏电流.
- 使用独立的BaTiO3膜和MoS2通道制造和表征顶门FeFET.
主要成果:
- 在制造的FeFET中实现了创纪录的高内存窗口 (0.22 V nm-1) 和超高介电常数 (52).
- 证明了接近理想的子值摆动 (60 mV dec-1),表明高效的切换和低功耗.
- 成功创建了一个能够进行内存逻辑和突触操作的3x4FeFET阵列.
结论:
- 开发的耐缺陷整合策略使得高k铁电氧化物在2D纳米电子学中的使用成为可能.
- 这种方法为节能逻辑,非挥发性内存和神经形态计算提供了一个可扩展和可转移的平台.
- 展示的FeFET和阵列为下一代可重新配置的电子设备铺平了道路.
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