概括
本研究介绍了一个被动对齐平台,用于可扩展的芯片集成,使电光系统的快速和可靠的组装. 这种方法克服了主动对齐的局限性,降低了先进的电子和光子包装的成本和复杂性.
科学领域:
- 光子学和电子学 集成 整合
- 半导体包装技术 半导体包装技术
- 纳米尺度对齐系统的系统.
背景情况:
- 基于芯片的系统的大规模集成对于未来的光子和电子应用至关重要.
- 目前的纳米级对齐方法 (主动对齐) 是缓慢而昂贵的,阻碍了可扩展性.
- 需要有效且具有成本效益的被动对齐解决方案.
研究的目的:
- 为快速,可靠和可扩展的电光系统组装开发一个被动对齐平台.
- 为了证明芯片对芯片光学互连的被动对齐的可行性.
- 为了降低与高精度芯片组装相关的成本和复杂性.
主要方法:
- 开发一个晶圆尺度的被动对齐平台,使用弹性平均化方案.
- 在芯片背面制造对齐结构.
- 芯片对芯片对齐准确度和光学链路损失的表征.
主要成果:
- 在芯片之间实现了260nm的横向对齐和240nm的高度对齐.
- 证明了芯片对芯片的光学链路损失为-2.4dB.
- 弹性平均化方案提供了一个强大的被动对齐解决方案.
结论:
- 开发的被动对齐平台使电光系统的快速,可靠和可扩展组装成为可能.
- 这种方法为芯片集成提供了积极对齐的成本效益高的替代方案.
- 该技术适合在先进的光子和电子包装中大规模实施.
相关概念视频
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