一个基于FPGA的可重新配置的加速器,用于实时同源转换在工业成像异质SoC中的实时同源转换
Yang Zhang1, Dejun Chen1, Huixiong Ruan1
1School of Optoelectronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China.
Sensors (Basel, Switzerland)
|January 10, 2026
概括
这项研究引入了实时亲属转换的新加速器,显著加快了工业图像处理. 可重新配置的系统芯片实现了5.3倍更快的图像校正和注册任务的性能.
科学领域:
- 计算机工程 计算机工程
- 图像处理 图像处理
- 硬件加速器 硬件加速器
背景情况:
- 实时亲属转换对于工业图像处理至关重要,但计算密集.
- 现有的方法因高的插值成本和低效的数据访问而扎.
研究的目的:
- 提出一种新的可重新配置的加速器架构,以实现高效的实时同源转换.
- 解决工业摄像机和扫描仪图像校正和注册中的计算瓶.
主要方法:
- 开发了一种异质的系统上芯片 (SoC) 架构,将控制 (ARM核心) 和数据路径 (FPGA) 分离.
- 实施了拟议的PATRM算法,使用了无乘法设计,Q15.16固点计算和AXI4爆发传输.
- 采用高效的块数据预检和管道处理,以提高吞吐量.
主要成果:
- 在高分辨率图像 (2095×2448) 中实现每秒25 (FPS),产生128.21M像素/秒的吞吐量.
- 与Block AT基线相比,显示了5.3倍的加快速度.
- 保持了超过26dB的峰值信号噪声比 (PSNR).
结论:
- 拟议的加速器满足工业扫描仪校正和其他苛刻的图像处理任务的实时要求.
- 该架构提供了低资源消耗和动态重新配置.
- PATRM算法显著提高了亲属转换的性能和效率.
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