通过边缘偏差电压和结构阻抗变化在矩形电压波形中提高HARC蚀刻的均性
Chanho Park1,2, Jinill Cho3,2, Junghwan Um2
1Department of Semiconductor and Display Engineering, Sungkyunkwan University, Suwon, 16419, South Korea.
Scientific reports
|January 20, 2026
概括
应用分离的直流边缘偏差可以提高半导体制造的等离子蚀刻统一性. 这种方法通过控制等离子体外潜力来提高蚀刻精度和产量,尽管高电压存在挑战.
科学领域:
- 材料科学与工程 材料科学与工程
- 等离子体物理与工程
- 半导体制造技术技术 半导体制造
背景情况:
- 等离子蚀刻对于半导体制造至关重要,使高比例电容器 (HARC) 和复杂的设备架构成为可能.
- 蚀刻期间的焦环侵蚀降低了等离子体的均性,并导致外扭曲,导致非均的蚀刻形状和降低了生产力.
- 这些问题需要先进的方法来保持等离子体稳定性和控制蚀刻过程.
研究的目的:
- 为了研究分离的直流边缘偏差在半导体蚀刻过程中对等离子体均性和离子发生率的影响.
- 控制等离子体外的潜力,以提高蚀刻均性和减轻轮倾斜.
- 为了优化聚焦环阻抗,以改善等离子体稳定性和外控制.
主要方法:
- 实施单独的直流边缘偏差系统,以局部控制晶圆边缘的等离子体外潜力.
- 对直流电压的实验变化和对焦环和晶圆之间的阻抗比率的修改.
- 在不同的电偏差条件下对蚀刻形状,均性和等离子体稳定性的分析.
主要成果:
- 在边缘定位的直流电压改善了蚀刻均性和缓解了轮倾斜,从而产生了明确的垂直沟.
- 超过280V的直流电压诱导了有害的电流流,导致等离子体不稳定性和薄膜控制受损.
- 将焦点环修改为晶圆阻比有效地减轻了电干扰和蚀刻不均.
结论:
- 分离直流边缘偏差是一种可行的策略,用于提高半导体制造中的等离子体均性和蚀刻配置控制.
- 仔细管理直流电压水平和阻抗匹配对于避免等离子体不稳定至关重要.
- 拟议的方法显示了在下一代内存设备制造中提高蚀刻效率和产量的希望.
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