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基于融合缩阵列的异质计算的卷积神经网络加速器的架构设计

Yang Zong¹, Zhenhao Ma¹, Jian Ren¹

¹School of Information Science and Engineering, Shenyang University of Technology, Shenyang 110870, China.

Sensors (Basel, Switzerland)

|January 28, 2026

概括

本研究介绍了一种使用异质计算的新型,低功耗的卷积神经网络 (CNN) 加速器. 该设计显著提高了嵌入式应用程序的能源效率,优于现有解决方案.

科学领域:

计算机工程计算机工程
人工智能的人工智能
硬件加速器硬件加速器

背景情况:

卷积神经网络 (CNN) 面临着高计算需求,资源使用和复杂性的挑战,限制了它们在微处理器上部署.
目前的CNN加速器具有有限的能源效率 (2.32-6.5925 GOPs/W),无法满足低功耗嵌入式系统的要求.

研究的目的:

提出一种低功耗,高能效的CNN加速器架构.
为了解决在资源有限的嵌入式场景中CNN的部署局限性.

主要方法:

开发了一个异构的计算架构,结合了中央处理单元 (CPU) 和特定应用程序集成电路 (ASIC).
实现了一个运营商融合的缩阵列算法,使用YOLOv5n作为基准网络.
集成了一个2D缩阵列与Conv-BN融合,用于深度操作员融合 (卷积,批量规范化,激活).
优化了RISC-V核心,以减少资源使用,并采用了锁定机制,并预先获取异步平台稳定性.

主要成果:

实现了20.6 GFLOPs的计算性能.
显示了1.96W的低功耗.
实现了10.46 GOPs/W. 的能源效率比率.
与现有的主流加速器相比,其能效提高了58-350%.

结论:

拟议的异质CNN加速器架构在能源效率和性能方面提供了显著的改进.
该设计显示了在低功耗嵌入式系统中有效部署的强大潜力.
运营商融合系统阵列和优化的RISC-V核心有助于克服CNN部署的挑战.

关键词:

卷积神经网络是一种卷积神经网络.硬件加速器是一个硬件加速器.不同质的计算方式.融合运营商融合运营商融合运营商缩阵列是一个缩阵列.

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