混合门MoS2 2T0C DRAM用于高线性低功耗多位存储
Zhejia Zhang1, Saifei Gou1, Yufei Song1
1State Key Laboratory of Integrated Chip and Systems, School of Microelectronics, Fudan University, Shanghai 200433, China.
National science review
|February 2, 2026
概括
研究人员开发了一种新的混合门MoS2 2T0C DRAM. 这种先进的内存技术为高性能计算应用提供了更好的保留和更低的写入电压.
科学领域:
- 材料科学 材料科学 材料科学
- 电气工程 电气工程
- 计算机工程 计算机工程
背景情况:
- 由于其密度和低功耗,双晶体管,零电容器 (2T0C) DRAM对于高性能计算至关重要.
- 传统的基于2D半导体的2T0C DRAM面临诸如降低读电流和在低写电压下增加功耗等挑战.
研究的目的:
- 为了解决传统2D 2T0C DRAM中的局限性.
- 为提高性能提出混合门结构.
主要方法:
- 使用Au-gate和Al-gate晶体管开发了一种混合门的MoS2 2T0C DRAM.
- 集成了一个32x32 MoS2 2T0C DRAM 电路.
主要成果:
- 实现了>100秒的保留时间.
- 将最小写入电压降低到0.2V,从而实现3位存储.
- 经证实图像存储和读取在600秒后<5%的位误差率.
结论:
- 混合门的MoS2 2T0C DRAM显示出高密度,低功耗内存的巨大潜力.
- 这项技术解决了传统2D DRAM的关键挑战.
- 展示的电路性能突出显示了它对未来内存应用的可行性.
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