在高精度时间同步中应用和比较基于FPGA的携带链TDC和DDMTD方案
Yuzhen Huang1, Jiajie Yu1, Wenlong Xia1
1College of Electronics and Information Engineering, Sichuan University, No. 24, Section 1, Yihuan Road, Wuhou District, Chengdu 610065, China.
Sensors (Basel, Switzerland)
|February 13, 2026
概括
本研究介绍了两种基于FPGA的相差测量方法,其中一个是八平行多载链时间到数字转换器 (TDC),它在精确计时应用中显示出卓越的精度,分辨率和温度稳定性.
科学领域:
- 电气工程 电气工程
- 数字信号处理 数字信号处理
- 测量科学 测量科学 测量科学
背景情况:
- 高精度相差测量对于时间频率传输和信号同步等应用至关重要.
- 传统方法在温度稳定性和测量准确性方面存在局限性.
- 现场可编程门阵列 (FPGA) 为先进的测量解决方案提供了一个灵活的平台.
研究的目的:
- 提出和评估两种使用FPGA技术的新型高精度相差测量方案.
- 解决现有方法在温度稳定性和准确性方面的缺陷.
- 为了比较八平行多载链时间到数字转换器 (TDC) 与单载链TDC和数字双混合器时间差 (DDMTD) 模块的性能.
主要方法:
- 在FPGA上实现一个八平行多载链TDC模块.
- 开发一个数字双混合器时间差 (DDMTD) 测量模块.
- 在不同条件下对测量精度,分辨率和温度稳定性的比较分析.
- 使用MMCM动态移相信号进行相差评估.
主要成果:
- 在室温下,单载链TDC的测量误差为4.7-6.0ps,超过DDMTD的20-75ps误差.
- 八平行多载链TDC在10°C至100°C范围内表现出卓越的准确性 (在室温下4.6ps的误差),分辨率 (0.833ps与6.329ps相比),以及温度稳定性 (0.000564ps/°C与0.002127ps/°C).
- 在不同温度条件下,八平行多载链TDC在精度,分辨率和温度稳定性方面始终超过单载链TDC.
结论:
- 八平行多载链TDC为基于FPGA的相差测量提供了显著的精度,分辨率和温度稳定性的改进.
- 两种拟议的FPGA方案都为传统方法提供了可行的替代方案,而多载链TDC对于苛刻的应用是可取的.
- 该研究为优化FPGA平台上的高精度相差测量技术提供了宝贵的见解,考虑到实施的复杂性和稳定性.
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