用超薄氧化接口双极层为低泄漏氧化半导体内存的门电流工程
Fabia F Athena1, Jonathan Hartanto1,2, Matthias Passlack3
1Department of Electrical Engineering, Stanford University, Stanford, California 94305, United States.
Nano letters
|February 23, 2026
概括
我们为无形氧化物半导体晶体管开发了氧化接口层 (SiL). 这种SiL增强了值电压控制和设备可靠性,提高了内存电池的性能和降低了能源消耗.
科学领域:
- 材料科学 材料科学 材料科学
- 半导体设备物理 半导体设备物理
- 电气工程 电气工程
背景情况:
- 无形氧化物半导体 (AOS) 为先进的电子提供了潜力.
- 控制值电压 (VT) 和提高可靠性是AOS晶体管技术的关键挑战.
研究的目的:
- 为 AOS 晶体管引入使用氧化接口层 (SiL) 的门电流工程方法.
- 评估SiL对VT,设备性能,可靠性和内存细胞特征的影响.
主要方法:
- 使用超薄的原子层沉积SiL在AOS通道和高-κ门介电器之间制造AOS晶体管.
- 描述VT转移,设备参数 (移动性,当前状态) 和在正偏差温度应力下的可靠性.
- 将SiL门堆集成到两晶体管增益电池 (GC) 内存中,并评估存储节点电压 (VSN) 稳定性,保留时间和泄漏电流.
主要成果:
- SiL至少启用了四个不同的VT级别,具有高达500mV的正转移,而不会降低移动性或状态电流.
- 在225°C以下处理的设备在应力下显示了减少的负VT转移,表明可靠性提高.
- 采用SiL工程的GC显示VSN下降率降低了67%,保留时间高达10000秒,备用泄漏电流减少了3个数量级.
结论:
- SiL 门电流工程方法为 AOS 晶体管提供了有效的 VT 控制和更高的可靠性.
- SiL集成显著提高了增益细胞内存设备的性能和能源效率.
- 这种方法为开发更稳定,更节能的半导体内存提供了可行的途径.
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