一个具有低复杂性的联合并行定时恢复循环,用于特拉赫兹通信系统及其FPGA实现
Feifei Wang1, Wentao Wang1, Linshan Xue1
1China Academy of Space Technology, Beijing 100094, China.
Sensors (Basel, Switzerland)
|February 27, 2026
概括
本研究引入了太赫兹 (THz) 通信的低复杂度并行定时恢复循环,提高了效率并减少了硬件需求. 这种新的设计实现了高速信号解调,性能损失最小.
科学领域:
- 电气工程 电气工程
- 信号处理 信号处理
- 无线通信无线通信
背景情况:
- 特拉赫兹 (THz) 通信系统需要高效的时间恢复来实现高速数据传输.
- 现有的定时恢复循环经常面临大带宽和有限的硬件资源的挑战.
研究的目的:
- 为大带宽THz通信系统提出一个低复杂度的联合并行定时恢复循环.
- 解决高速THz系统中机载资源的短缺问题.
主要方法:
- 一个联合并行定时恢复循环,结合了修改匹配过器 (MMF) 和定时错误检测器 (TED).
- 通过并行数据缓存 (DC) 进行采样点偏移校正.
- 时间阶段错误补偿通过滑动的货币市场基金系数.
主要成果:
- 与理论比特错误率 (BER) 曲线相比,循环表现出高效运行,性能损失小于0.1dB.
- 在THz FPGA平台上,成功地以220 GHz的速度对15 Gbps的64QAM信号进行并行解调.
- 显著减少硬件资源消耗.
结论:
- 拟议的循环是高速THz通信系统的可行解决方案.
- 它有效地平衡了性能和资源效率.
- 实施验证了其在苛刻的通信环境中的实际适用性.
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