通过无损单立体3D集成的大规模门周围MoS2晶体管阵列
Chao Chen1,2, Kuanglei Chen1,2, Hang Zhao1,2
1Academy for Advanced Interdisciplinary Science and Technology, Key Laboratory of Advanced Materials and Devices for Post-Moore Chips Ministry of Education, State Key Laboratory for Advanced Metals and Materials, University of Science and Technology Beijing, Beijing 100083, China.
National science review
|March 13, 2026
概括
研究人员开发了一种新的无损单立体3D集成工艺,用于二硫化 (MoS2) 门周围全方位场效应晶体管 (GAAFET). 这种接口工程策略克服了性能退化,使高性能二维材料设备能够统一大规模集成.
科学领域:
- 材料科学 材料科学 材料科学
- 纳米技术纳米技术
- 电气工程 电气工程
背景情况:
- 将2D材料集成到3D架构中提供了先进的处理能力.
- 介电沉积过程中的接口化降低了MoS2 3D门全方位 (GAA) 场效应晶体管 (FET) 的性能,阻碍了大规模集成.
研究的目的:
- 为了证明MoS2 GAAFET的无损单立体3D (M3D) 集成过程.
- 为了克服3D集成设备中接口兴奋剂引起的性能下降.
- 为了实现具有超高电流密度的多通道MoS2GAAFET的高度统一,大规模集成.
主要方法:
- 使用范德瓦尔斯与MoS2接触的接口工程策略,以减少接口状态和介电兴奋剂.
- 通过Sb2O3层形成水友表面,以改善高κ介电沉积.
- 112个MoS2 GAAFET设备的制造和表征.
主要成果:
- 创纪录的平均状态电流密度为227μA/μm (峰值>335μA/μm).
- 理想的最小子值波动接近60mV/dec.
- 与平面结构相比,阻力-电容延迟减少了46%,由TCAD模拟证实.
结论:
- 开发的接口工程策略使MoS2 GAAFET的M3D集成无损.
- 这种方法通过最大限度地减少接口状态和介电合,显著提高了GAAFET的性能.
- 在高密度M3D异质集成中建立了一个可行的制造途径,用于在接口中无兴奋剂的介电沉积.
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