Dartmouth's next generation EIS system: preliminary hardware considerations

Our previous system covered the frequency range of 0 to 1 MHz. In this new design we propose to cover the range from 0 to 10 MHz. The higher frequencies have forced us to reconsider several design decisions in view of both the physics of the problem and the performance of available electronic components. In this presentation we examine in detail the constraints faced by the designer, starting from wiring consideration to measurement techniques. We will also present the solutions we selected to overcome the limitations we discovered. The problems include phase detection, amplitude measurements, system organization and layout and finally system calibration.