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Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon
Published on: July 17, 2020
Buried amorphous-layer impact on dislocation densities in silicon
1Institute of Electron Technology, Al. Lotników 32/46, 02-668 Warsaw, Poland. mwzorek@ite.waw.pl
A buried amorphous layer in silicon piezo-resistors, despite causing defects, effectively reduced dislocation density after annealing. This contrasts with surface amorphous layers, offering insights into defect control in electronic materials.
Area of Science:
- Materials Science
- Solid-State Physics
- Semiconductor Device Physics
Background:
- Amorphous layers can influence defect evolution in silicon.
- Understanding dislocation behavior is crucial for semiconductor device performance.
- Silicon piezo-resistors are sensitive to mechanical stress and defects.
Purpose of the Study:
- To investigate the effect of amorphous layers on dislocation densities in silicon piezo-resistors.
- To compare the impact of buried versus surface amorphous layers on defect reduction.
- To analyze dislocation depth distributions after annealing.
Main Methods:
- Transmission electron microscopy (TEM) for defect imaging.
- Chemical etching techniques for defect visualization.
- Mechanical bevel polishing for depth profiling.
- Annealing to study defect evolution.
Main Results:
- The presence of an initial buried amorphous layer reduced dislocation density in the p-n junction depletion region after annealing.
- Recrystallization introduced additional defects.
- Surface amorphous layers did not provide the same level of dislocation reduction.
Conclusions:
- Buried amorphous layers can act as effective barriers or sinks for dislocations during annealing in silicon.
- Strategic placement of amorphous layers can mitigate detrimental dislocation effects in silicon piezo-resistors.
- Annealing processes need careful consideration of amorphous layer location for optimal defect management.
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