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Parallel optical interconnects may reduce the communication bottleneck in symmetric multiprocessors
Applied Optics
|March 25, 2008
Summary
Optical interconnects (OI) can address future symmetric multiprocessor (SMP) communication bottlenecks. OIs offer a path to higher bandwidth and density, crucial for large-scale computing systems.
Area of Science:
- Computer Architecture
- Optical Communications
- High-Performance Computing
Background:
- Symmetric Multiprocessor (SMP) architectures face communication bottlenecks.
- Cache coherence protocols are critical for data integrity in SMPs.
- Future large SMPs require significantly higher address transmission bandwidths.
Purpose of the Study:
- To analyze communication issues in SMP architectures.
- To evaluate the benefits of implementing optical interconnects (OI) in SMPs.
- To propose solutions for overcoming future bandwidth challenges.
Main Methods:
- Detailed analysis of communication bottlenecks in SMPs.
- Investigation of optical interconnects for cache-coherent switches.
- Consideration of optical bus implementations.
Main Results:
- Address transmission is identified as a critical bottleneck for future large SMPs.
- Optical interconnects (OI) show potential to meet future bandwidth demands (200-300 Gb/s).
- Point-to-point OIs in VLSI switches can emulate shared-bus functions with high IO density.
Conclusions:
- Optical interconnects are essential for scaling future SMP systems.
- OI integration presents challenges in IO density and packaging.
- Optical buses offer multi-access capabilities but impact cache coherence protocols.
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