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A racetrack mode-locked silicon evanescent laser.
Alexander W Fang1, Brian R Koch, Kian-Giap Gan
1University of California, Santa Barbara, Department of Electrical and Computer Engineering, Santa Barbara, CA 93106, USA. awfang@ece.ucsb.edu
Optics Express
|June 11, 2008
Summary
A novel racetrack resonator topography enables on-chip mode-locked silicon evanescent lasers (ML-SELs) without facet polishing. This advancement allows for precise repetition rate control and integration with other silicon devices.
Area of Science:
- Photonics
- Integrated Optics
- Semiconductor Lasers
Background:
- Silicon evanescent lasers (SELs) are crucial for integrated photonics.
- Traditional SEL fabrication often relies on precise facet polishing, hindering monolithic integration.
- Mode-locking is essential for generating ultrashort optical pulses.
Purpose of the Study:
- To develop an on-chip mode-locked silicon evanescent laser (ML-SEL) independent of facet polishing.
- To enable precise control over the ML-SEL's repetition rate.
- To demonstrate the feasibility of integrating ML-SELs with other silicon photonic devices.
Main Methods:
- Utilized a racetrack resonator topography for laser design.
- Achieved both passive and hybrid mode-locking mechanisms.
- Fabricated the device using standard silicon lithography for cavity length definition.
Main Results:
- Demonstrated a mode-locked silicon evanescent laser (ML-SEL) without the need for facet polishing.
- Achieved transform-limited, 7 ps pulses at a repetition rate of 30 GHz.
- Measured a minimum absolute jitter of 364 fs and a maximum locking range of 50 MHz under hybrid mode-locking.
Conclusions:
- The racetrack resonator approach offers a robust method for on-chip ML-SEL fabrication.
- This technology facilitates integration with other silicon-based photonic and electronic components.
- The precise repetition rate control and low jitter are promising for advanced optical communication and signal processing applications.
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