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Reduced order multiport parallel and multidirectional neural associative memories.

Abdul Aziz Bhatti¹

¹School of Science and Technology, University of Management and Technology, Lahore, Pakistan. drabhatti@gmail.com

Biological Cybernetics

|April 22, 2009

Summary

This summary is machine-generated.

This study introduces new multiport associative memory architectures that significantly reduce interconnections by subdividing vectors. These k-port and k-directional memories offer over 80% interconnection savings for parallel processing systems.

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Area of Science:

Computer Science
Artificial Intelligence
Neuroscience

Background:

Associative memories are crucial for pattern recognition and information retrieval.
Existing outer product type associative memories often suffer from high interconnection complexity.
Implementing spatio-temporal sequences and multiassociative memories requires efficient architectures.

Purpose of the Study:

To propose novel multiport parallel and multidirectional intraconnected associative memories with reduced interconnections.
To introduce k-directional and k-port parallel memory architectures.
To analyze the impact of reduced interconnectivity on memory performance.

Main Methods:

Subdividing N-bit vectors into k sublengths to compute submemory matrices.
Intraconnecting submemory matrices to form k-port parallel or k-directional memories.
Analyzing the construction, storage, and retrieval processes of the proposed architectures.

Main Results:

Achieved substantial reduction in interconnections, exceeding 80% in examples.
Determined minimum and maximum limits for vector subdivision (k).
Investigated the trade-offs between reduced interconnectivity complexity and retrieval quality, signal-to-noise ratio, and storage capacity.

Conclusions:

The proposed memory architectures offer significant interconnection savings, making them suitable for large-scale systems.
These architectures are analogous to biological neural structures and digital parallel port memories.
The developed topologies are symmetric and scalable for broader applications in parallel and multiprocessing systems.