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Updated: Jun 23, 2026

Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology
Published on: December 7, 2015
The heterogeneous integration of single-walled carbon nanotubes onto complementary metal oxide semiconductor
Chia-Ling Chen1, Vinay Agarwal, Sameer Sonkusale
1Department of Electrical and Computer Engineering, NSF Center for High-rate Nanomanufacturing, Northeastern University, Boston, MA 02115, USA. chen.ch@neu.edu
Abstract:
A simple methodology for integrating single-walled carbon nanotubes (SWNTs) onto complementary metal oxide semiconductor (CMOS) circuitry is presented. The SWNTs were incorporated onto the CMOS chip as the feedback resistor of a two-stage Miller compensated operational amplifier utilizing dielectrophoretic assembly. The measured electrical properties from the integrated SWNTs yield ohmic behavior with a two-terminal resistance of approximately 37.5 kOmega and the measured small signal ac gain (-2) from the inverting amplifier confirmed successful integration of carbon nanotubes onto the CMOS circuitry. Furthermore, the temperature response of the SWNTs integrated onto CMOS circuitry has been measured and had a thermal coefficient of resistance (TCR) of -0.4% degrees C(-1). This methodology, demonstrated for the integration of SWNTs onto CMOS technology, is versatile, high yield and paves the way for the realization of novel miniature carbon-nanotube-based sensor systems.
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