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Study of thick microporous silicon layer from highly resistive silicon
Jugurtha Semai1, Gaël Gautier, Laurent Ventura
1Laboratoire de Microelectronique de Puissance, University of Tours, 16 rue Pet M. Curie 37071, Tours Cedex, France.
Journal of Nanoscience and Nanotechnology
|June 10, 2009
Summary
This study demonstrates smooth porous silicon (PS) fabrication for power electronics. Optimized etching achieved microporous silicon layers up to 400 micrometers thick with 50% porosity, crucial for device integration.
Area of Science:
- Materials Science
- Electrical Engineering
- Nanotechnology
Background:
- Porous silicon (PS) is a promising material for power electronics due to its electrical insulating properties.
- Smooth PS surfaces are essential for subsequent processing steps like photolithography and metallization.
Purpose of the Study:
- To develop a method for fabricating smooth porous silicon surfaces suitable for power electronic applications.
- To investigate the relationship between porosity, thickness, and structural integrity of microporous silicon.
Main Methods:
- Utilized low-doped (30-50 Ohmcm) p-type silicon.
- Employed a specific etching solution containing HF-H2O and acetic acid.
- Fabricated structures with pore dimensions ranging from nanometers (microporous) to micrometers (macroporous).
Main Results:
- Successfully implemented microporous silicon structures using the HF-H2O and acetic acid solution.
- Achieved layers up to 400 micrometers thick with a porosity of 50%.
- Demonstrated that porosity versus thickness is a key parameter for evaluating microporous silicon structure integrity.
Conclusions:
- The developed method enables the fabrication of smooth porous silicon suitable for power electronic device integration.
- Microporous silicon layers with controlled porosity and significant thickness can be achieved.
- Porosity and thickness are critical factors for ensuring the structural integrity of fabricated porous silicon layers.

