Quantitative evaluation of process induced strain in MOS transistors by Convergent Beam Electron Diffraction

Convergent Beam Electron Diffraction (CBED) experiments and simulations associated with Finite Element calculations were performed in order to measure strain and stress in a complex device such as periodic MOS transistors with a spatial resolution of about 2 nm and a sensitivity that could reach 50 MPa. A lamella of a thickness of about 475 nm was extracted from the wafer with the transistors by Focus Ion Beam (FIB) and was observed in cross-section in a Transmission Electron Microscope (TEM). When approaching the transistors, the HOLZ lines of the CBED patterns acquired in the silicon substrate, become broader and broader. This HOLZ line broadening, which is due to the stress relaxation in the thin foil, was used to determine quantitatively the strain and stress in the lamella and then in the bulk device. We showed that this procedure could be applied to a complex device. Two parameters, the intrinsic material strains--or equivalently the intrinsic material stresses--in the nickel silicide (NiSi) and nitride (Si(3)N(4)) layers on the top of the transistors gate, were successfully fitted by trial and error, in the procedure.