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Related Concept Videos

Metal-Semiconductor Junctions01:24

Metal-Semiconductor Junctions

The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The semiconductor's...
Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
MOSFET01:16

MOSFET

The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
In an n-MOSFET, the structure includes n-type source and drain...
MOS Capacitor01:25

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no current...

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Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

SungWoo Nam1, Xiaocheng Jiang, Qihua Xiong

  • 1Department of Chemistry and Chemical Biology, School of Engineering and Applied Sciences, Harvard University, Cambridge, MA 02138, USA.

Proceedings of the National Academy of Sciences of the United States of America
|November 27, 2009
PubMed
Summary
This summary is machine-generated.

Researchers developed functional 3D integrated circuits using indium arsenide nanowire (NW) n-type field-effect transistors (FETs) and germanium/silicon NW p-type FETs. These novel 3D circuits achieve high-frequency operation, demonstrating promise for advanced electronics.

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Nanotechnology

Background:

  • Three-dimensional (3D) integrated circuits offer superior integration density, speed, and power efficiency over traditional 2D circuits.
  • Advancements in nanoscale materials and fabrication are crucial for realizing complex 3D architectures.
  • Complementary metal-oxide-semiconductor (CMOS) technology is fundamental to modern electronics.

Purpose of the Study:

  • To demonstrate fully functional 3D integrated CMOS circuits using distinct n-type and p-type nanowire (NW) field-effect transistors (FETs).
  • To evaluate the performance characteristics, including DC gain and switching behavior, of these novel 3D CMOS circuits.
  • To achieve high-frequency operation in 3D integrated circuits fabricated from chemically synthesized nanoscale materials.

Main Methods:

  • Fabrication of vertically interconnected 3D CMOS circuits utilizing separate layers of n-type indium arsenide (n-InAs) NW FETs and p-type germanium/silicon core/shell (p-Ge/Si) NW FETs.
  • Characterization of the DC voltage output (V(out)) versus input (V(in)) response of CMOS inverters to assess switching behavior and DC gain.
  • Construction and testing of three-stage CMOS ring oscillators to measure oscillation frequency and stability.

Main Results:

  • Demonstrated sharp switching in CMOS inverters near the ideal half-supply voltage with a substantial DC gain of approximately 45.
  • Observed rail-to-rail output switching, consistent with large noise margins and minimal static power consumption characteristic of CMOS.
  • Achieved stable, self-sustained oscillations in three-stage ring oscillators at a maximum frequency of 108 MHz, a record for integrated circuits based on chemically synthesized nanoscale materials.

Conclusions:

  • The successful fabrication and operation of 3D integrated CMOS circuits highlight the versatility of bottom-up assembly for combining diverse nanoscale materials.
  • The achieved performance metrics, including high gain and frequency, underscore the significant potential of 3D integrated circuits for next-generation electronic devices.
  • This work paves the way for advanced 3D integrated systems with enhanced performance by leveraging the unique properties of nanomaterials.