The development of high quality seals for silicon patch-clamp chips

Area of Science:

• Biophysics
• Materials Science
• Electrophysiology

Background:

• Planar patch-clamp offers advantages over traditional methods but suffers from poor seal quality due to chip geometry and substrate properties.
• Improving seal quality is crucial to fully realize the benefits of planar patch-clamp technology.

Purpose of the Study:

• To characterize physical surface parameters influencing seal formation in planar patch-clamp chips.
• To identify critical surface properties for enhancing seal quality and success rates.
• To validate suitable chip candidates for diverse electrophysiological applications.

Main Methods:

• Utilized Atomic Force Microscopy (AFM), Scanning Electron Microscopy (SEM), X-ray Photoelectron Spectroscopy (XPS), surface energy measurements, and impedance spectroscopy.
• Employed a statistical design of experiments (DOE) approach for comprehensive surface characterization.
• Validated chip performance using electrophysiological recordings on cell types expressing IRK1, hERG, and hNa(v)1.5 ion channels.

Main Results:

• Dispersive surface interactions and micropore size were identified as the most critical parameters for high-quality seals.
• Surface roughness and dielectric membrane thickness showed less impact on seal quality.
• A suitable planar patch-clamp chip candidate was successfully identified through multi-scale analysis and validation.

Conclusions:

• Physical characterization of chip surfaces is essential for optimizing planar patch-clamp performance.
• Understanding the role of dispersive interactions and micropore size enables the development of superior biochips.
• This approach provides a framework for selecting and designing advanced substrates for biochip applications.